View M52693_106929.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

MITSUBISHI ICs (AV COMMON)
M52693SP
BURST LOCK CLOCK GENERATOR
DESCRIPTION
The M52693SP is a semiconductor integrated circuit developed for analog signal processing of a picture-in-picture system, consisting of a sync separator, an ACC, a burst lock clock generator circuit, an analog switch and a clamp circuit, etc. It is also available on digital video signal systems other than the above.
PIN CONFIGURATION (TOP VIEW)
PIP CVBS OUT GND MAIN CLAMP CAP. VIDEO IN 1 VCC2 VCC VIDEO IN 2 APC FILTER VCXO OUT
1 2 3 4 5 6 7 8 9
30 SUB CLAMP OUT 29 REFERENCE A/D+ 28 SMALL LUMA IN 27 REFERENCE A/D26 SMALL CHROMA IN 25 GND 2 24 BURST GATE IN 23 VCA OUT 22 FREE RUN CONTROL 21 FSC OUT 20 INPUT SW CONTROL 1 19 4FSC OUT 18 INPUT SW CONTROL 2 17 SUPER SWITH 16 SYNC SEP. OUT
FEATURES
Low power dissipation of supply voltage 5.0V and circuit current 32mA (Typ.) Built-in 4fsc burst lock clock generator circuit required for digital video signal processing Small picture chroma level following main picture burst level Main picture pedestal level matching small picture pedestal level Built-in reference voltage source for A/D converter
ACC FILTER 10 VCXO IN 11 VCA CAP. 12 MAIN CHROMA IN 13 MAIN VIDEO OUT 14 SYNC SEP. IN 15
APPLICATION
TV, VCR
RECOMMENDED OPERATING CONDITION
Supply voltage range...................................................... 4.7 to 5.3V Rated supply voltage.................................................................5.0V
Outline 30P4B
BLOCK DIAGRAM
SUPER REFERENCE REFERENCE 4FSC SUB A/D+ SMALL A/D- SMALL BURST FREE INPUT OUT INPUT SWITH SYNC CLAMP LUMA CHROMA GATE VCA RUN FSC SW SW SEP. OUT IN IN GND 2 IN OUT CONTROL OUT CONTROL 1 CONTROL 2 OUT 21 23 22 20 30 29 28 27 24 19 18 17 26 25 16 MIX. CHFOMA VCA REF. BGP GEN. bgp FREE RUN CTRL. fsc SW CTRL. 4fsc SW CTRL. S2 SW CTRL.
S3
S1
MAIN CLAMP
S2
S3 1/4 DEV. bgp
SYNC SEPARATOR bgp
S1 PHASE COMP. CLAMP CLAMP VCXO LEVEL DET. ACC
1 PIP CVBS OUT
2 GND
3
4
5
6 VCC
7
8
9
10
11
12
13
14
15
MAIN VIDEO VCC2 CLAMP IN 1 CAP.
VIDEO APC VCXO ACC VCXO IN 2 FILTER OUT FILTER IN
VCA MAIN MAIN SYNC CAP. CHROMA VIDEO SEP. IN OUT IN
MITSUBISHI ICs (AV COMMON)
M52693SP
BURST LOCK CLOCK GENERATOR
ABSOLUTE MAXIMUM RATINGS (Ta=25C, unless otherwise noted)
Symbol VCC Pd Topr Tstg Parameter Supply voltage Power dissipation Operating temperature Storage temperatare Ratings 6.0 1265 -20 to +75 -40 to +125 Unit V mW C C
MITSUBISHI ICs (AV COMMON)
M52693SP
BURST LOCK CLOCK GENERATOR
MITSUBISHI ICs (AV COMMON)
M52693SP
BURST LOCK CLOCK GENERATOR
MITSUBISHI ICs (AV COMMON)
M52693SP
BURST LOCK CLOCK GENERATOR
MITSUBISHI ICs (AV COMMON)
M52693SP
BURST LOCK CLOCK GENERATOR
ELECTRICAL CHARACTERISTICS TEST METHOD VR VR=VRH-VRL VSOH, VSOL, tH and tPDH
SYNC IN (PG 1 ) tPDH
SYNC OUT (Pin 16 ) GND
tH
VSOH VSOL
Sync-in
Measure tH and tPDH when the input amplitude of pin is 0.1VP-P. Make sure that tH and tPDH are within the allowable range. When the input amplitude of pin 15 is 0.6VP-P, make sure that tH and tPDH are within the allowable range.
15
If the voltage which appears at pin 30 when pin 18 is "H" is taken as Vsub1, and the voltage which appears at pin 30 when pin 18 is "L" is taken as Vsub2, the clamp offset is given by the following expression: DVSRB = (Vsub1 - V27), (Vsub2 - V27)
Vsub and VSRB
Measure pin 30 DC output voltage in correspondence to the "H" and "L" states of pin 18 .
Gsub
Measure pin pin 18 .
30
gain in correspondence to the "H" and "L" states of
CTsub, Cmain, and CTPIP
Measure crosstalk under the following input conditions: Pin connection Switching condition:Left Input codition:Right 4 CTsub CTmain CTPIP CTsub 1 Ctsub 2 CTmain 1 CTmain 2 CTPIP 1 CTPIP 2 Sine wave Amplitude 0.3VP-P Frequency 3.58MHz b a b a b a IN -IN -IN -a b a b a b 7 -IN -IN -IN 17 0V 0V 0V 0V 0 0 5V 5V 18 5 0 0V 0V 0V 0V 0V 5V 5 0 5V 0V 20 0V 0V 0V 5V
Prameter
Input signal
fBWsub
Measure pin 30 frequency characteristics in correspondence to the "H" and "L" states of pin 18 . Condition: -3dB
fBWmain
Measure pin
14
frequency characteristics in correspondence to the
20
"H" and "L" states of pin
. Condition: -3dB
Vmain
Measure pin 14 DC output voltage in correspondence to the "H" and "L" states of pin 20 .
VPIP
If the voltage which appears at pin 1 when pin 20 is "H" is taken as Vpip1, and the voltage which appears at pin 1 when pin 20 is "L" is taken as Vpip2, VPIP is given by the following expression: VPIP = Vpip1 - VPIP , Vpip2 - VPIP
Gmain
Measure pin pin 20 .
14
gain in correspondence to the "H" and "L" states of
MITSUBISHI ICs (AV COMMON)
M52693SP
BURST LOCK CLOCK GENERATOR
GPIPSC
Pin 12 = 2.185V V1 = Amplitude of pin GPIPSC = 20 log (V1/V23)
1
CTPIPS
V23 = Amplitude of pin
23
GPIP
Measure pin pin 20 .
1
gain in correspondence to the "H" and "L" states of
fBWPIP
Measure pin 1 frequency characteristics in correspondence to the "H" and "L" states of pin 20 . Condition: -3dB
Apply 5.0V to pin 20 . Define as VOS1 the amplitude which appears at pin 1 a when pin 17 is "H", and as VOM1 the amplitude which appears when pin 17 is "L". Then apply 0V to pin 20 . Define as VOS2 the amplitude which appears at pin 1 when pin 17 is "H", and as VOM2 the amplitude which appears at pin 1 when "L". CTPIPS is given under the above conditions by the equation given below. CTPIPS=20log (VOMI/VOSI), 201log (VOM2/VOS2)
VCAtyp, VCAmax, VCAmin, Gmax, Lvca
20 log {(amplitude of pin 23)/SG5}
Condition: -3dB
fBWPIPS
V4fSCH, L; VfSCH, L; 4fsc; fsc
Make sure that the input signal at pin 13 is synchronous with the output signal at pin 19 .
4fSC
PIN 19 V4fSCL GND V4fSCH
fSC
PIN 21 VfSCL GND VfSCH
fcp (+)
1) Raise the frequency of SG8 input signal so that the signal is synchronous with pin 19 output signal. 2) Lower the SG8 frequency. 3) Measure the SG8 frequency (f1) when the SG8 input signal is synchronous with the pin 19 output signal. 4) fcp(+) = f1 - fc (fc = 3.579545MHz)
C-IN
Make sure that the pin 13 input signal is synchronous with the pin 19 output signal when the input amplitude of pin 13 is 0.20VP-P. Then make sure that the pin 13 input signal is synchronous with the pin 19 output signal when the input amplitude is 0.01VP-P.
fcp (-)
1) Lower the frequency of SG8 input signal so that the signal is synchronous with pin 19 output signal. 2) Raise the SG8 frequency. 3) Measure the SG8 frequency (f2) when the SG8 input signal is synchronous with the pin 19 output signal. 4) fcp(-) = f2 - fc (fc = 3.579545MHz)
MITSUBISHI ICs (AV COMMON)
M52693SP
BURST LOCK CLOCK GENERATOR
INPUT SIGNAL
SG No. SG1 SG2 Input signal NTSC system composite video signal (1VP-P) Sine wave Frequency: 3.58MHz Amplitude : 0.1VP-P Sine wave Frequency: 3.58MHz Amplitude : 0.2VP-P Sine wave Frequency: 3.58MHz Amplitude : 0.01VP-P Sine wave Frequency: 3.58MHz Amplitude : 0.3VP-P C-Sync + sine wave C-Sync Frequency: 15.734kHz Amplitude : 0.285VP-P Sine wave Frequency: 1/10MHz Amplitude : 0.715VP-P Sine wave Frequency: 3.58MHz Amplitude : 0.2VP-P Y signal Amplitude : 0.715VP-P SG6 Remarks --- ---
SG2'
---
SG2''
---
SG3
SG4
SG5
---
SG7
Sine wave Frequency: 1/10MHz Amplitude : 0.2VP-P Sine wave Frequency: Variable Amplitude : 0.1VP-P C-Sync Frequency: 15.734kHz Amplitude : 0.3VP-P VOL=2.75V C-Sync Amplitude : 0.1VP-P 0.6VP-P
---
SG8
---
PG1
VOL
PG1'
---
MITSUBISHI ICs (AV COMMON)
M52693SP
BURST LOCK CLOCK GENERATOR
TEST CIRCUIT
M
1 2
30 29 SW28
M M b a 10 10 75 M SW26 b a 10 10 75
0.01
75 10 a 10 b M 5 6 75 10 a 10 b M 2.2 0.01
10 3 SW4 4 5 6 SW7 7 8 1.5k 0.47 9 10 22 21 20 19 18 17 16 24 23 27 26 25 28
500
0.01
BGP in M 22 M 20 M 18 17 M Resistance : Capacitance : F
0.01
330 SW11
51
1M 11 10 75 1 a 1 b M 14 15 SW13 13 12
Notes: 1. Capacitance values are in FARADS 2. Resistors are in OHMS 3. : VCC : GND
Units
TYPICAL CHARACTERISTICS
THERMAL DERATING (MAXIMUM RATING)
1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 -20 0 20 40 60 80 100 120 140 160 25 75 125 AMBIENT TEMPERATURE Ta (C)

▲Up To Search▲

Price & Availability of M52693

	To Download M52693 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .